| Distributor | Stock | Pricing | MOQ | PKG | Lead Time | Date Code | On Order Quantity | On Order Delivery | |
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6,000 pcs
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6000 pcs | On Request | 1 | On Request | On Request | On Request | On Request | On Request | |
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2,057 pcs
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2057 pcs | On Request | 1 | On Request | On Request | On Request | On Request | On Request | |
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300 pcs
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300 pcs | On Request | 1 | On Request | On Request | On Request | On Request | On Request |
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The PTN3460BS/F6Y from NXP Semiconductors is an embedded DisplayPort to LVDS bridge device designed for connectivity between an eDP source and an LVDS display panel. It processes the incoming DisplayPort stream, converts it to LVDS format, and transmits the processed stream.
This IC supports DisplayPort v1.2 and v1.1a, with main link rates of 1.62 Gbit/s and 2.7 Gbit/s. It can operate with 1 or 2 lanes and features a 1 Mbit/s AUX channel supporting native AUX and I2C-over-AUX transactions. The device offers flexibility with options for single or dual bus LVDS signaling, supporting color depths of 18 or 24 bits per pixel and a pixel clock frequency up to 112 MHz.
Key features include EDID ROM emulation for panels without EDID ROM, firmware flexibility via an embedded microcontroller and NVM, and LVDS panel power sequencing control. The PTN3460BS/F6Y is available in a 56-HVQFN 7 mm x 7 mm package with a 0.4 mm pitch and can be powered by a 3.3 V supply or dual supplies (3.3 V/1.8 V).
It is suitable for applications requiring DisplayPort to LVDS conversion, offering high flexibility and performance for various platform environments. The integrated termination resistors and auto receive equalization contribute to reliable signal integrity.
| Qty | Low | High |
|---|---|---|
| 1+ | $6.39 | $6.39 |
Estimated market price range - modelled values for guidance only, not live distributor offers.
The PTN3460BS/F6Y is a DisplayPort to LVDS bridge device that enables connectivity between an embedded DisplayPort (eDP) source and an LVDS display panel.
It is compliant with DP v1.2 and v1.1a, and eDP v1.2 and v1.1.
The device supports main link rates of 1.62 Gbit/s (Reduced Bit Rate) and 2.7 Gbit/s (High Bit Rate).
It supports single bus or dual bus LVDS signaling with color depths of 18 bits per pixel or 24 bits per pixel.
The device is available in a 56-HVQFN 7 mm x 7 mm package with 0.4 mm pitch.
Yes, it can emulate EDID ROM behavior to support panels without EDID ROM and supports EDID structure v1.3 with on-chip emulation for up to seven different EDID data structures.