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5000 pcs | On Request | 1 | On Request | On Request | On Request | On Request | 2026-02-16 21:33:16 |
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The PTN3460BS/F4Y is an embedded DisplayPort to LVDS bridge IC from NXP Semiconductors, designed to facilitate connectivity between an embedded DisplayPort (eDP) source and an LVDS display panel. This device processes the incoming DisplayPort stream, converts it to LVDS format, and transmits it to the display controller.
Key features include support for DP v1.2 and eDP v1.2 compliance, with main link operation supporting 1 or 2 lanes at rates of 1.62 Gbit/s or 2.7 Gbit/s. It handles single or dual bus LVDS signaling with color depths of 18 or 24 bits per pixel, and a pixel clock frequency up to 112 MHz. The device offers EDID ROM emulation for panels lacking EDID ROM, supporting EDID structure v1.3 and up to seven different EDID data structures.
This IC is available in a 56-HVQFN 7 mm x 7 mm package with a 0.4 mm pitch and supports surface mount. It can be powered by a 3.3 V supply or dual supplies (3.3 V/1.8 V). The PTN3460BS/F4Y integrates an embedded microcontroller and NVM for firmware flexibility, along with LVDS panel power sequencing control.
It provides high flexibility with configuration options including multi-level configuration pins, DP AUX interface, and I2C-bus interface. The device also features integrated 50 Ohm termination resistors and high-performance Auto Receive Equalization.
| Qty | Low | High |
|---|---|---|
| 1+ | $6.39 | $6.39 |
Estimated market price range - modelled values for guidance only, not live distributor offers.
The PTN3460BS/F4Y is an embedded DisplayPort to LVDS bridge device that enables connectivity between an embedded DisplayPort (eDP) source and an LVDS display panel.
It is compliant to DP v1.2 and v1.1a, and eDP v1.2 and v1.1.
It supports Main Link rates of 1.62 Gbit/s (Reduced Bit Rate) and 2.7 Gbit/s (High Bit Rate).
It supports color depths of 18 bits per pixel or 24 bits per pixel.
The maximum pixel clock frequency supported is 112 MHz.
Yes, it supports EDID ROM emulation to assist panels without EDID ROM, including support for EDID structure v1.3 and emulation of up to seven different EDID data structures.
It can be powered by either a 3.3 V supply only or dual supplies (3.3 V/1.8 V).