PM4354-NI

The PM4354-NI is a monolithic integrated circuit from PMC-Sierra designed for shorthaul and longhaul telecommunications applications. This device integrates four T1/E1 framers and line interfaces, offering software selectable operation between T1/J1 and E1 modes on a per-device basis.

Key features include the encoding and decoding of B8ZS, HDB3, and AMI line codes, along with receive equalization, clock recovery, and line performance monitoring. It provides transmit and receive jitter attenuation and incorporates four full-featured HDLC controllers, each equipped with 128-byte transmit and receive FIFO buffers. Configuration, control, and status monitoring are managed via an 8-bit microprocessor bus interface.

The receiver offers typical signal recovery of up to -43 dB at 1024 kHz (E1) and -44 dB at 772 kHz (T1/J1), with guaranteed minimums of -32 dB (E1) and -36 dB (T1/J1). It frames to DSX/DS-1 signals in SF and ESF formats, and to ITU-T G.704 basic and CRC-4 multiframe formatted E1 signals. The device tolerates high-frequency jitter exceeding 0.4 UI peak-to-peak as required by industry standards.

Packaged in an stPBGA with a 1mm pitch and measuring 17mm, the PM4354-NI is designed for surface mount applications. It provides programmable in-band loopback and code detection capabilities, and its transmitter generates E1 pulses compliant to G.703.