| Distributor | Stock | Pricing | MOQ | PKG | Lead Time | Date Code | On Order Quantity | On Order Delivery | |
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1,330 pcs
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1330 pcs | On Request | 1 | On Request | On Request | 0828+ | On Request | On Request |
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The PCA9518APW from NXP Semiconductors is a CMOS integrated circuit designed for I2C-bus and SMBus systems. It functions as an expandable 5-channel, bidirectional buffer, enabling the extension of I2C-bus systems by buffering both the data (SDA) and clock (SCL) lines. This allows for virtually unlimited bus expansion beyond the typical 400 pF capacitance limit.
The device supports multiple masters and accommodates both Standard-mode and Fast-mode I2C-bus devices. It features active HIGH individual repeater enable inputs and open-drain input/outputs. The PCA9518APW ensures lock-up-free operation and supports arbitration and clock stretching across the repeater. It operates within a voltage range of 2.3 V to 3.6 V and keeps I2C-bus I/O pins in a high-impedance state when VDD is below 2.0 V, improving partial power-down performance.
Designed for surface mount installation, the PCA9518APW is suitable for applications requiring extended I2C communication capabilities. Its expandable nature allows for the creation of larger bus segments by grouping multiple PCA9518A devices.
| Qty | Low | High |
|---|---|---|
| 1+ | $6.39 | $6.39 |
Estimated market price range - modelled values for guidance only, not live distributor offers.
The PCA9518APW operates within a voltage range of 2.3 V to 3.6 V.
The PCA9518APW is compatible with I2C-bus and SMBus protocols.
The PCA9518APW provides an expandable 5-channel, bidirectional buffer.
The PCA9518APW features open-drain input/outputs.
Yes, the PCA9518APW accommodates multiple masters on the I2C bus.