| Distributor | Stock | Pricing | MOQ | PKG | Lead Time | Date Code | On Order Quantity | On Order Delivery | |
|---|---|---|---|---|---|---|---|---|---|
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15 pcs
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15 pcs | On Request | 1 | On Request | On Request | B204BBJ5 | On Request | On Request | |
|
7 pcs
|
7 pcs | On Request | 1 | On Request | On Request | On Request | On Request | On Request |
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| Power Consumption |
The Lattice Semiconductor PALCE610H25PC is a general-purpose Programmable Array Logic (PAL) device, functionally equivalent to the EP610. It features 600 gates and 16 macrocells that can be individually configured for user specifications. The macrocells support registered or combinatorial operation, with registers programmable as D, T, J-K, or S-R flip-flops.
This device utilizes advanced CMOS EE technology, offering low power consumption and high speed with a typical propagation delay of 15ns. It operates at a 5V supply voltage and a frequency of 50MHz. The PALCE610H25PC is available in a space-saving 24-pin PDIP package.
Designed for ease of prototyping, this device can be quickly erased and reprogrammed. A security bit is available to protect proprietary designs from copying. It is suitable for applications requiring flexible logic implementation with up to 20 inputs and 16 outputs.
| Qty | Low | High |
|---|---|---|
| 1+ | $1.28 | $1.28 |
Estimated market price range - modelled values for guidance only, not live distributor offers.
The PALCE610H25PC operates at 5V.
The PALCE610H25PC is offered in a PDIP-24 through-hole package.
The maximum operating frequency is 50 MHz.
The PALCE610H25PC contains 16 macro cells.
Typical power consumption is 90 mA.
The PALCE610H25PC is listed as non-compliant with RoHS.