| Distributor | Stock | Pricing | MOQ | PKG | Lead Time | Date Code | On Order Quantity | On Order Delivery | |
|---|---|---|---|---|---|---|---|---|---|
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12 pcs
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12 pcs | On Request | 1 | On Request | On Request | On Request | On Request | On Request |
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| Manufacturer Name |
The PALCE610H-15PC is a general purpose Programmable Array Logic (PAL) device from N-A, functionally equivalent to the EP610. It is designed to accommodate logic functions with up to 20 inputs and 16 outputs, utilizing 16 independently configurable I/O macrocells. These macrocells can be configured as either registered or combinatorial, with registers supporting D, T, J-K, or S-R flip-flop types.
The device employs a sum-of-products logic structure with a programmable-AND and fixed-OR array. It is manufactured using advanced CMOS EE technology, offering low power consumption and high speed, with a worst-case propagation delay (tPD) of 15 ns. The PALCE610H-15PC is available in space-saving 24-pin SKINNYDIP and 28-pin PLCC packages, making it suitable for various board designs.
This device supports asynchronous clocking and features register preload for testability and power-up reset for initialization. Its electrically erasable technology allows for quick reprogramming, facilitating easy prototyping. The security bit can be enabled to protect proprietary designs from unauthorized copying. The PALCE610 family is supported by extensive third-party software and programmer solutions.
| Qty | Low | High |
|---|---|---|
| 1+ | $7.19 | $7.19 |
Estimated market price range - modelled values for guidance only, not live distributor offers.
The worst-case propagation delay (tPD) for the PALCE610H-15PC is 15 ns.
The PALCE610H-15PC has 16 I/O macrocells.
The PALCE610H-15PC is available in 24-pin SKINNYDIP and 28-pin PLCC packages.
The typical current consumption (ICC) is 90 mA.