NSVMUN5137DW1T1G

The NSVMUN5137DW1T1G is a Dual PNP Bias Resistor Transistor (BRT) from ON Semiconductor, designed to replace a single transistor and its external bias network. This integrated device simplifies circuit design, reduces board space, and lowers component count.

Key electrical specifications include a collector-emitter voltage of 50V and a continuous collector current of 100mA. It also features a nominal base resistor (R1) of 47 kΩ and an emitter-base resistor (R2) of 22 kΩ. The device has a minimum DC current gain (hFE) of 80 at 10mA/5V and a Vce saturation of 250mV maximum at 300µA/10mA.

This transistor array is supplied in a surface mount SOT-363 package, also known as SC-88/SC70-6. The standard package quantity is 3000 units on a tape and reel. The device is Pb-free and Halogen-free compliant.

This series of digital transistors is designed to replace a single device and its external resistor bias network. The Bias Resistor Transistor (BRT) contains a single transistor with a monolithic bias network consisting of two resistors; a series base resistor and a base-emitter resistor. The BRT eliminates these individual components by integrating them into a single device. The use of a BRT can reduce both system cost and board space.