| Distributor | Stock | Pricing | MOQ | PKG | Lead Time | Date Code | On Order Quantity | On Order Delivery | |
|---|---|---|---|---|---|---|---|---|---|
|
1,414 pcs
|
1414 pcs | On Request | 1 | On Request | On Request | On Request | On Request | On Request |
| Category | |
| Manufacturer Name | |
| Clock Frequency | |
| Current | |
| Function | |
| Input Capacitance | |
| Lead Spacing | |
| Lead Style | |
| Mounting Type | |
| Number of Bits per Element | |
| Number of Elements | |
| Operating Temperature | |
| Output Type | |
| Supplier Device Package | |
| Tape & Reel | |
| Trigger Type | |
| Type | |
| Voltage |
The MM74C76N from On Semiconductor is a dual J-K flip-flop integrated circuit built with complementary MOS technology. Each flip-flop includes independent J, K, clock, and clear inputs, along with Q and Q outputs. The MM74C76N also incorporates preset inputs and is supplied in a 16-pin package.
This device is edge-sensitive to the clock input, changing state on the negative-going transition of the clock pulse. Clear or preset functions are independent of the clock and are accomplished by a low level on the respective input. The flip-flop operates with a supply voltage range of 3V to 15V and offers a clock frequency of up to 11 MHz.
Key electrical characteristics include high noise immunity (0.45 VCC typical) and low power consumption (50 nW typical). It is tenth power TTL compatible, capable of driving 2 LPTTL loads. The operating temperature range is -55°C to 125°C.
The MM74C76N is available in a 16-PDIP (Plastic Dual-In-Line Package) with a 0.300" width, suitable for through-hole mounting.
| Qty | Low | High |
|---|---|---|
| 1+ | $0.86 | $0.86 |
Estimated market price range - modelled values for guidance only, not live distributor offers.
The supply voltage range is 3V to 15V.
The operating temperature range is -55°C to 125°C.
It is available in a 16-DIP (0.300", 7.62mm) package, also referred to as 16-PDIP.
The typical clock frequency is 11 MHz.
The outputs are complementary (Q and Q-bar).
The flip-flop is triggered on the negative edge of the clock.
It contains two flip-flop elements.