| Distributor | Stock | Pricing | MOQ | PKG | Lead Time | Date Code | On Order Quantity | On Order Delivery | |
|---|---|---|---|---|---|---|---|---|---|
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1,940 pcs
|
1940 pcs | On Request | 1 | On Request | On Request | On Request | On Request | On Request | |
|
1,387 pcs
|
1387 pcs | On Request | 1 | On Request | On Request | 05+44 | On Request | On Request |
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The MC74VHC125DTR2 from On Semiconductor is a high-speed CMOS quad bus buffer designed for efficient signal buffering in digital systems. Fabricated with silicon gate CMOS technology, it achieves high speed operation while maintaining low power dissipation.
This device features 3-state control inputs, requiring the output enable (OE) to be set High to place the output into a high impedance state. The inputs are compatible with standard CMOS levels, and the device can function as a level converter for interfacing 3.3V to 5.0V systems due to its full 5.0V CMOS level output swings. The internal circuitry includes a buffer output for high noise immunity and stable output.
Key electrical characteristics include an operating voltage range of 2V to 5.5V, a typical propagation delay of 3.8 ns at 5V, and a maximum quiescent current of 4 µA at 25°C. It offers high noise immunity with VNIH and VNIL at 28% VCC and low noise with VOLP at a maximum of 0.8V. ESD performance exceeds 2000V (Human Body Model), and latchup performance exceeds 100 mA.
The MC74VHC125DTR2 is supplied in a 14-TSSOP surface mount package. Its design allows for compatibility with other standard logic families and provides power-down protection on inputs.
| Qty | Low | High |
|---|---|---|
| 1+ | $1.20 | $1.20 |
Estimated market price range - modelled values for guidance only, not live distributor offers.
2V to 5.5V.
14-TSSOP (4.40mm width).
-55°C to 125°C.
3-State.
4.
3.8 ns at 5V VCC.
4 µA.