| Distributor | Stock | Pricing | MOQ | PKG | Lead Time | Date Code | On Order Quantity | On Order Delivery | |
|---|---|---|---|---|---|---|---|---|---|
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13,426 pcs
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13426 pcs | On Request | 1 | On Request | On Request | On Request | On Request | On Request | |
|
863 pcs
|
863 pcs | On Request | 1 | On Request | On Request | 2000 | On Request | On Request |
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The MC10EP51DR2 is a differential clock D flip-flop with reset, designed for high-speed digital applications. It provides a typical propagation delay of 350 ps and can operate at frequencies exceeding 3 GHz. The device supports both PECL and NECL operating modes, with voltage ranges of 3.0 V to 5.5 V for PECL and -3.0 V to -5.5 V for NECL.
The flip-flop features an asynchronous, level-triggered reset input. Data is entered on a low clock and transferred to the outputs on a positive clock transition. The differential clock inputs allow for negative edge triggering. The device includes clamp circuitry on its differential inputs for stability under open input conditions.
Packaged in an 8-SOIC surface mount configuration, the MC10EP51DR2 is suitable for various electronic designs. It operates within an ambient temperature range of -40°C to 85°C. The component is RoHS3 compliant and has a Moisture Sensitivity Level (MSL) of 1.
This flip-flop is functionally equivalent to the EL51 and LVEL51 devices. The 100 Series designation indicates temperature compensation is included.
| Qty | Low | High |
|---|---|---|
| 1+ | $0.86 | $0.86 |
Estimated market price range - modelled values for guidance only, not live distributor offers.
The typical propagation delay is 350 ps.
The maximum frequency is greater than 3 GHz.
It operates from 3.0 V to 5.5 V in PECL mode and -3.0 V to -5.5 V in NECL mode.
The operating temperature range is -40°C to 85°C (TA).
The MC10EP51DR2 is supplied in an 8-SOIC package.
Yes, the MC10EP51DR2 is RoHS3 Compliant.
The Moisture Sensitivity Level is 1 Unlimited.