| Distributor | Stock | Pricing | MOQ | PKG | Lead Time | Date Code | On Order Quantity | On Order Delivery | |
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4,761 pcs
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4761 pcs | On Request | 1 | On Request | On Request | On Request | On Request | On Request |
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The MC100EP196BFAR2G from On Semiconductor is a programmable delay chip (PDC) designed for clock deskewing and timing adjustments. It features a digitally selectable resolution of approximately 10 ps and a total programmable delay range of up to 10.4 ns, with available total delays from 2.5 ns to 13 ns.
This device provides variable delay for differential NECL/PECL input transitions. It includes an FTUNE pin for fine-tuning the output delay by 0 to 60 ps using an analog voltage. The delay is selected via 10 data select inputs (D[9:0]) and controlled by the LEN pin. The MC100EP196BFAR2G has a fixed minimum delay of 2.2 ns and supports LVPECL, LVDS, LVCMOS, ECL, or LVTTL input levels.
Packaged in a 32-LQFP surface mount package, the MC100EP196BFAR2G operates within a voltage supply range of 3V to 3.6V and an operating temperature range of -40°C to 85°C. Its 1024 taps allow for precise timing control in various applications.
| Qty | Low | High |
|---|---|---|
| 1+ | $3.00 | $3.00 |
Estimated market price range - modelled values for guidance only, not live distributor offers.
The available total delays range from 2.5 ns to 13 ns, with a maximum programmable delay range of up to 10.4 ns.
The MC100EP196BFAR2G has 1024 taps.
The tap increment is 10 ps.
The device operates within a voltage supply range of 3 V to 3.6 V.
The operating temperature range is -40°C to 85°C.
It is supplied in a 32-LQFP package for surface mounting.
Yes, the FTUNE pin allows for fine-tuning the output delay from 0 to 60 ps using an analog voltage.