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7 pcs
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7 pcs | On Request | 1 | On Request | On Request | On Request | On Request | On Request |
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The LMK04821NKDT is an ultra-low noise clock jitter cleaner from Texas Instruments, designed with a dual-loop PLLatinum PLL architecture. It offers JESD204B support and achieves ultra-low RMS jitter, with values as low as 88 fs (12 kHz to 20 MHz).
This device features a maximum clock output frequency of 3.1 GHz and supports various output types including LVPECL, LVDS, HSDS, and LCPECL. It operates within a voltage range of 3.15V to 3.45V and an industrial temperature range of -40°C to 85°C. The LMK04821NKDT is housed in a 64-pin WQFN package measuring 9.0 mm x 9.0 mm x 0.8 mm and is designed for surface mount.
Key electrical characteristics include a noise floor of -162.5 dBc/Hz at 245.76 MHz and a normalized PLL noise floor of -227 dBc/Hz. It supports up to 14 differential device clocks from PLL2 and up to 7 SYSREF clocks. The device also includes features like hitless switching, LOS detection, an integrated low-noise crystal oscillator circuit, and holdover mode.
This clock conditioner is suitable for applications requiring high-precision clocking and jitter reduction. Its robust design and comprehensive features make it a versatile component for complex timing systems.
| Qty | Low | High |
|---|---|---|
| 1+ | $15.21 | $15.21 |
Estimated market price range - modelled values for guidance only, not live distributor offers.
The operating temperature range is -40°C to 85°C.
The LMK04821NKDT is available in a 64-WQFN (9x9) package.
The LMK04821NKDT is RoHS3 Compliant.
The MSL rating is Level-3-260C-168 HR.
The maximum clock output frequency is 3.1 GHz.
The ultra-low RMS jitter is 88 fs from 12 kHz to 20 MHz.
The operating voltage range is 3.15V to 3.45V.