| Distributor | Stock | Pricing | MOQ | PKG | Lead Time | Date Code | On Order Quantity | On Order Delivery | |
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40 pcs
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40 pcs | On Request | 1 | On Request | On Request | On Request | On Request | On Request |
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The Lattice Semiconductor LFE2M35SE-6FN256C is a Field Programmable Gate Array (FPGA) from the LatticeECP2/M family. This device offers a logic density of 34,000 LUTs and supports up to 140 I/O pins. It includes 2,151,424 total RAM bits and 4,250 LABs (Logic Array Blocks).
Key features include embedded SERDES capabilities with data rates up to 3.125 Gbps and up to 16 channels. The FPGA incorporates sysDSP blocks for high-performance multiply and accumulate operations, flexible sysMEM Embedded Block RAM (EBR), and distributed RAM. It also features sysCLOCK Analog PLLs and DLLs for clock management.
Designed for system integration, this FPGA supports a wide range of interfaces through its programmable sysI/O buffer, including LVTTL, LVCMOS, SSTL, HSTL, and differential standards like LVDS and LVPECL. The device operates at a voltage range of 1.14V to 1.26V and has an operating temperature range of 0°C to 85°C (TJ).
The LFE2M35SE-6FN256C is supplied in a 256-FPBGA (17x17 mm) package and is designed for surface mounting. It is 1149.1 Boundary Scan compliant and supports SPI boot flash interface and dual boot images.
The LFE2M35SE-6FN256C FPGA has 34,000 logic elements.
The LFE2M35SE-6FN256C FPGA has 140 I/O pins.
The LFE2M35SE-6FN256C FPGA has a total of 2,151,424 RAM bits.
The operating voltage range for the LFE2M35SE-6FN256C FPGA is 1.14V to 1.26V.
The operating temperature range for the LFE2M35SE-6FN256C FPGA is 0°C to 85°C (TJ).
The LFE2M35SE-6FN256C FPGA is supplied in a 256-FPBGA (17x17 mm) package.
The embedded SERDES in the LFE2M35SE-6FN256C FPGA supports data rates from 250 Mbps to 3.125 Gbps.