| Distributor | Stock | Pricing | MOQ | PKG | Lead Time | Date Code | On Order Quantity | On Order Delivery | |
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2 pcs
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2 pcs | On Request | 1 | On Request | On Request | 806 | On Request | On Request |
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The Lattice LFE2M35E-5FN672C is a Field Programmable Gate Array (FPGA) from the LatticeECP2/M family. It offers a high logic density with 34,000 logic elements and 4,250 LABs, supported by 2.15 Mbits of embedded block RAM and 202 Kbits of distributed RAM.
This FPGA features 410 I/O pins and operates within a voltage range of 1.14V to 1.26V, with an operating temperature of 0°C to 85°C (TJ). It supports embedded SERDES with data rates up to 3.125 Gbps across up to 16 channels, along with multiple DSP blocks and PLLs/DLLs for clock management.
The device is configured in a 672-FPBGA package, measuring 27x27mm, and utilizes surface mount technology. It supports a wide range of I/O standards including LVTTL, LVCMOS, SSTL, HSTL, and differential signaling like LVDS and LVPECL. Configuration options include 1149.1 Boundary Scan compliance and an SPI boot flash interface.
Key features include flexible memory resources, programmable I/O buffers, and pre-engineered source synchronous I/O capabilities. The Lattice LFE2M35E-5FN672C is suitable for various system integration applications requiring high logic density and flexible I/O.
The LFE2M35E-5FN672C FPGA has 34000 logic elements.
The LFE2M35E-5FN672C has 410 I/O pins.
The operating voltage range for the LFE2M35E-5FN672C FPGA is 1.14V to 1.26V.
The LFE2M35E-5FN672C FPGA is supplied in a 672-FPBGA package.
The embedded SERDES in the LFE2M35E-5FN672C supports data rates from 250 Mbps to 3.125 Gbps.
The LFE2M35E-5FN672C has 55Kbits to 5308Kbits of embedded block RAM.