| Distributor | Stock | Pricing | MOQ | PKG | Lead Time | Date Code | On Order Quantity | On Order Delivery | |
|---|---|---|---|---|---|---|---|---|---|
|
609 pcs
|
609 pcs | On Request | 1 | On Request | On Request | On Request | On Request | On Request |
| Category | |
| Manufacturer Name | |
| Lead Spacing | |
| Mounting Type | |
| Number of I | |
| Number of LABs | |
| Number of Logic Elements | |
| Operating Temperature | |
| Supplier Device Package | |
| Total RAM Bits | |
| Voltage |
The Lattice LFE2M35E-5FN484C is a Field Programmable Gate Array (FPGA) from the LatticeECP2/M family. It offers a high logic density with 34,000 LUTs and 4,250 LABs, providing 303 I/O pins for system integration. This device includes 2.15 Mbit of embedded block RAM and supports various interfaces through its programmable sysIO buffer.
The FPGA operates within a voltage range of 1.14V to 1.26V and has an operating temperature range of 0°C to 85°C (TJ). It is supplied in a 484-FPBGA (23x23 mm) surface mount package.
Key features include embedded SERDES capabilities with data rates up to 3.125 Gbps, sysDSP blocks for high-performance multiply and accumulate operations, and flexible memory resources. The device is also compliant with 1149.1 Boundary Scan and supports SPI boot flash interfaces.
The LFE2M35E-5FN484C FPGA has 34,000 logic elements.
The LFE2M35E-5FN484C has 303 I/O pins.
The operating temperature range for the LFE2M35E-5FN484C is 0°C to 85°C (TJ).
The LFE2M35E-5FN484C operates at 1.14V to 1.26V.
The LFE2M35E-5FN484C is supplied in a 484-BBGA package.
The FPGA supports embedded SERDES data rates from 250 Mbps to 3.125 Gbps.
The LFE2M35E-5FN484C has a total of 2,151,424 RAM bits.