| Distributor | Stock | Pricing | MOQ | PKG | Lead Time | Date Code | On Order Quantity | On Order Delivery | |
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200 pcs
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200 pcs | On Request | 1 | On Request | On Request | On Request | On Request | On Request |
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The Lattice LFE2-70E-5FN672I is a Field Programmable Gate Array (FPGA) from the LatticeECP2/M family. It offers a high logic density with 68,000 logic elements and 8,500 LABs, providing ample resources for system integration.
This FPGA features 500 I/O pins and operates within a voltage range of 1.14V to 1.26V. It includes flexible memory resources with up to 1,056,768 total RAM bits, comprising both embedded block RAM (EBR) and distributed RAM. The device also supports embedded SERDES with data rates from 250 Mbps to 3.125 Gbps and up to 16 channels.
Designed for system-level integration, the LFE2-70E-5FN672I supports a wide range of interfaces through its programmable sysI/O™ buffer, including LVTTL, LVCMOS, SSTL, HSTL, and various differential standards like LVDS and LVPECL. It also features sysCLOCK Analog PLLs and DLLs for clock management and pre-engineered source synchronous I/O capabilities.
The device is supplied in a 672-FPBGA (27x27 mm) package, suitable for surface mounting. Its operating temperature range is -40°C to 100°C (TJ). Configuration options include 1149.1 Boundary Scan compliance and an SPI boot flash interface.
The LFE2-70E-5FN672I FPGA has 68,000 logic elements.
The LFE2-70E-5FN672I FPGA offers 500 I/O pins.
The LFE2-70E-5FN672I FPGA operates within a voltage range of 1.14V to 1.26V.
The LFE2-70E-5FN672I FPGA is supplied in a 672-FPBGA (27x27 mm) package.
The embedded SERDES in the LFE2-70E-5FN672I supports data rates from 250 Mbps to 3.125 Gbps.
The LFE2-70E-5FN672I FPGA has 1,056,768 total RAM bits.