| Distributor | Stock | Pricing | MOQ | PKG | Lead Time | Date Code | On Order Quantity | On Order Delivery | |
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2 pcs
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2 pcs | On Request | 1 | On Request | On Request | On Request | On Request | On Request |
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The Lattice Semiconductor LFE2-50E-6F672C is a Field Programmable Gate Array (FPGA) from the ECP2 family. This device offers a high logic density with 48,000 logic elements and 6,000 LABs, complemented by 396,288 bits of embedded block RAM.
It provides 500 I/O pins, supporting a wide range of interfaces including LVTTL, LVCMOS, SSTL, HSTL, LVDS, and LVPECL. The operating voltage range is between 1.14V and 1.26V, with an operating junction temperature range of 0°C to 85°C.
The FPGA is configured in a 672-BBGA package and is designed for surface mounting. Key features include support for SPI boot flash, dual boot images, and TransFR I/O for field updates. The datasheet also mentions embedded SERDES capabilities with data rates up to 3.125 Gbps and up to 16 channels, along with sysDSP blocks for high-performance multiply and accumulate operations.
The LFE2-50E-6F672C FPGA has 48,000 logic elements and 6,000 LABs.
The LFE2-50E-6F672C FPGA has 500 I/O pins.
The operating voltage range for the LFE2-50E-6F672C FPGA is 1.14V to 1.26V.
The LFE2-50E-6F672C FPGA is supplied in a 672-BBGA package.
The operating temperature range for the LFE2-50E-6F672C FPGA is 0°C to 85°C (TJ).
The Lattice ECP2/M family supports data rates from 250 Mbps to 3.125 Gbps with up to 16 channels per device.