| Distributor | Stock | Pricing | MOQ | PKG | Lead Time | Date Code | On Order Quantity | On Order Delivery | |
|---|---|---|---|---|---|---|---|---|---|
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3,539 pcs
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3539 pcs | On Request | 1 | On Request | On Request | On Request | On Request | On Request | |
|
2,270 pcs
|
2270 pcs | On Request | 1 | On Request | On Request | 20+ | On Request | On Request |
| Category | |
| Manufacturer Name | |
| Halogen Free | |
| Lead Spacing | |
| Mounting Type | |
| Number of I | |
| Number of I/O | |
| Number of LABs | |
| Number of Logic Elements | |
| Operating Temperature | |
| Process | |
| Supplier Device Package | |
| Tape & Reel | |
| Total RAM Bits | |
| Voltage |
The Lattice Semiconductor LCMXO2-640HC-4SG48I is an FPGA from the MachXO2 family, designed for ultra-low power and instant-on applications. This device offers a flexible logic architecture with 640 LUTs and 80 LABs, providing 18.432 kbits of total RAM. It supports up to 40 I/O pins and operates within a voltage range of 2.375V to 3.465V.
Key features include embedded and distributed memory, on-chip user flash memory with 100,000 write cycles, and pre-engineered source synchronous I/O support for interfaces like DDR and LPDDR. The device is built on a 65nm low-power process and has an operating temperature range of -40°C to 100°C (TJ).
This FPGA is available in a 48-QFN (7x7) package, suitable for surface mount applications. It supports various I/O standards including LVCMOS, LVTTL, LVDS, and HSTL. The MachXO2 family is known for its non-volatile, infinitely reconfigurable nature, offering secure, single-chip solutions for consumer and system applications.
The LCMXO2-640HC-4SG48I has 640 LUTs.
The LCMXO2-640HC-4SG48I has 40 I/O pins.
The operating voltage range is 2.375V to 3.465V.
It is supplied in a 48-QFN (7x7) package.
The operating temperature range is -40°C to 100°C (TJ).
Yes, it has up to 256 kbits of User Flash Memory with 100,000 write cycles.
It supports LVCMOS 3.3/2.5/1.8/1.5/1.2, LVTTL, PCI, LVDS, Bus-LVDS, MLVDS, RSDS, LVPECL, SSTL 25/18, and HSTL 18.