| Distributor | Stock | Pricing | MOQ | PKG | Lead Time | Date Code | On Order Quantity | On Order Delivery | |
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100 pcs
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100 pcs | On Request | 1 | On Request | On Request | 09+ | On Request | On Request |
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| Manufacturer Name | |
| Differential | |
| Divider | |
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| PLL | |
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| Voltage |
The Lattice Semiconductor ISPPAC-CLK5620AV-01T100I is an in-system programmable, enhanced zero-delay clock generator designed for high-performance applications. It features a wide input/output frequency range from 8MHz to 400MHz, with low output-to-output skew and jitter.
This device offers up to 20 programmable fan-out buffers with support for various output standards including LVTTL, LVCMOS, HSTL, and LVDS. It includes a high-performance Phase-Locked Loop (PLL) with programmable dividers and an on-chip loop filter. Precision programmable phase adjustment allows for fine-tuning of skew per output.
The ISPPAC-CLK5620AV-01T100I supports multiple clock frequency domains and flexible clock reference inputs. It is housed in a 100-TQFP (14x14) surface mount package and operates within a supply voltage range of 3V to 3.6V. The operating temperature range is -40°C to 85°C.
Key features include hot-socket compliance for all inputs and outputs, four user-programmable profiles stored in non-volatile memory, and full JTAG boundary scan test support. This makes it suitable for circuit board common clock generation and distribution, PLL-based frequency generation, and high fan-out clock buffering applications.
The input/output operation frequency ranges from 8MHz to 400MHz.
It offers up to 20 programmable fan-out buffers.
The output-to-output skew is less than 50ps.
Supported output standards include LVTTL, LVCMOS, HSTL, eHSTL, SSTL, LVDS, LVPECL, Differential HSTL, and SSTL.
The operating temperature range is -40°C to 85°C.
It is supplied in a 100-TQFP (14x14) package.
The supply voltage range is 3V to 3.6V.