ISPPAC-CLK5610AV-01TN48C

The Lattice Semiconductor ispPAC-CLK5610AV-01TN48C is an in-system-programmable, enhanced zero-delay clock generator designed for high-performance communications and computing applications. It features input/output operation from 8MHz to 400MHz with low output-to-output skew of less than 50ps and low peak-to-peak jitter.

This device offers up to 20 programmable fan-out buffers with support for various output standards including LVTTL, LVCMOS, HSTL, SSTL, LVDS, and LVPECL. It also provides programmable output impedance and slew rate. The integrated high-performance PLL allows for programmable lock detect, multiply/divide ratios, and on-chip loop filtering, making it compatible with spread spectrum clocks.

Precision programmable phase adjustment per output is available with 16 settings, offering up to +/- 12ns skew range. The device supports up to five clock frequency domains and features flexible clock reference and external feedback inputs with programmable standards. It includes four user-programmable profiles stored in E2CMOS memory and full JTAG boundary scan test support.

The ispPAC-CLK5610AV-01TN48C is housed in a 48-TQFP (7x7) package and is designed for surface mount applications. It operates within a commercial temperature range of 0°C to 70°C and requires a voltage supply of 3V to 3.6V.