ISPPAC-CLK5510V-01TN48C

The Lattice Semiconductor ispClock 5500 family device, ISPPAC-CLK5510V-01TN48C, is an in-system programmable clock generator with universal fan-out buffer capabilities. It operates from 10MHz to 320MHz, offering low output-to-output skew of less than 50ps and peak-to-peak jitter below 70ps. This device supports up to 20 programmable fan-out buffers, with programmable output standards including LVTTL, LVCMOS, HSTL, SSTL, LVDS, and LVPECL. The output impedance is programmable from 40 to 70 Ohms in 5 Ohm increments, and slew rate is also programmable.

Featuring a fully integrated high-performance PLL, it supports programmable lock detect and flexible clock reference inputs. The device allows for precision programmable phase adjustment per output, with up to +/- 12ns skew range. It can handle up to five clock frequency domains and includes four user-programmable profiles stored in E2CMOS memory for multiple operating configurations. The ISPPAC-CLK5510V-01TN48C is available in a 48-TQFP package and operates within a commercial temperature range of 0°C to 70°C.

Applications include circuit board common clock generation and distribution, PLL-based frequency generation, and high fan-out clock buffering in communications and computing systems.