| Distributor | Stock | Pricing | MOQ | PKG | Lead Time | Date Code | On Order Quantity | On Order Delivery | |
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6,500 pcs
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6500 pcs | On Request | 1 | On Request | On Request | On Request | On Request | On Request |
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The Lattice Semiconductor ISPPAC-CLK5304S-01TN48I is an in-system programmable, zero-delay universal fan-out buffer designed for clock distribution applications. It supports input/output frequencies ranging from 8MHz to 267MHz, with low output-to-output skew of less than 100ps and low jitter peak-to-peak of less than 70 ps.
This device features a fully integrated high-performance PLL and offers up to 20 programmable fan-out buffers. It supports various single-ended output standards including LVTTL, LVCMOS, HSTL, eHSTL, and SSTL, with programmable output impedance from 40 to 70 Ω. The operating temperature range is -40°C to 85°C, and it is available in a 48-TQFP package.
Key electrical characteristics include a programmable phase adjustment per output with a minimum step size of 156ps and a skew range up to ±5ns. It supports multiple clock frequency domains and flexible clock reference and external feedback inputs. The device is hot-socket compliant and supports JTAG boundary scan test for in-system programming.
The operating frequency range is 8 MHz to 267 MHz.
The output-to-output skew is less than 100 ps.
Supported input signal standards include HSTL, LVCMOS, LVDS, LVPECL, LVTTL, and SSTL.
The operating temperature range is -40°C to 85°C.
The device is available in a 48-TQFP (7x7) and a 48-LQFP package.
The supply voltage range is 3 V to 3.6 V.