| Distributor | Stock | Pricing | MOQ | PKG | Lead Time | Date Code | On Order Quantity | On Order Delivery | |
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744 pcs
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744 pcs | On Request | 1 | On Request | On Request | N/A | On Request | On Request |
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The Lattice Semiconductor ispLSI 2000VE family, including the ISPLSI2064VE-100LT100, provides high-density programmable logic solutions. These devices are designed to implement complex logic functions such as registers, counters, multiplexers, and state machines.
The ISPLSI2064VE-100LT100 features a system performance of 300 MHz and a pin-to-pin delay of 3 ns, making it suitable for high-speed applications. It operates with a 3.3V programmable logic core and offers 3.3V/5V compatible I/O, providing flexibility in system design. The family utilizes Generic Logic Blocks (GLBs) and a global interconnect scheme to maximize system flexibility and performance, allowing for up to 80% utilization of available logic.
This CPLD is in-system programmable via IEEE 1149.1 (JTAG) and supports boundary scan testing. The ispLSI 2000VE family is part of a range of devices offering densities from 1,000 to 8,000 gates, addressing various system logic needs.
The system performance is 300 MHz.
The pin-to-pin delay is 3 ns.
The I/O is 3.3V/5V compatible.
The RoHS status is RoHS3 Compliant.
The Moisture Sensitivity Level is 1 Unlimited.