| Distributor | Stock | Pricing | MOQ | PKG | Lead Time | Date Code | On Order Quantity | On Order Delivery | |
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2,555 pcs
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2555 pcs | On Request | 1 | On Request | On Request | 0746+ | On Request | On Request |
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| Technology |
The Lattice Semiconductor Corporation ISPLSI2032VL-135LT48 is a high-density CPLD from the ispLSI 2000 Family. This device features 1000 PLD gates and provides 32 universal I/O pins, along with 32 registers. It operates at a voltage of 2.5V and can achieve a maximum operating frequency of 180 MHz, with a typical propagation delay of 5.0 ns.
Built on an advanced 0.35 micron E2CMOS technology, the ISPLSI2032VL-135LT48 is in-system programmable. It offers a global routing pool for complete interconnectivity between its logic blocks. The device is supplied in a 48-TQFP package.
This CPLD is suitable for applications requiring high-density programmable logic, combining the ease of use of PLDs with the flexibility of FPGAs. Its features include wide input gating for fast counters and state machines, and it is 100% tested at the time of manufacture.
The maximum operating frequency is 180 MHz.
The typical propagation delay is 5.0 ns.
The operating voltage is 2.5V.
It is supplied in a 48/TQFP package.
The RoHS status is RoHS3 Compliant.
The Moisture Sensitivity Level is 1 Unlimited.