| Distributor | Stock | Pricing | MOQ | PKG | Lead Time | Date Code | On Order Quantity | On Order Delivery | |
|---|---|---|---|---|---|---|---|---|---|
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112 pcs
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112 pcs | On Request | 1 | On Request | On Request | 95+ | On Request | On Request |
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| Manufacturer Name | |
| Propagation Delay | |
| SVHC Present | |
| Technology |
The ISPLSI2032-150LT from Lattice Semiconductor Corporation is a High Density Programmable Logic Device belonging to the ispLSI 2000 Family. This CPLD offers 1000 PLD gates and 32 Universal I/O pins, supported by a Global Routing Pool (GRP) for complete interconnectivity.
Key electrical specifications include a maximum operating frequency of 180 MHz and a propagation delay of 5.0 ns. The device is built on an advanced 0.35 micron E2CMOS technology and supports 5V in-system programmability (ISP). It features 32 registers and is housed in a QFP package.
This non-volatile, electrically erasable and reprogrammable CPLD is suitable for applications requiring flexible logic implementation. Its design offers the ease of use and fast system speed of PLDs combined with the density and flexibility of Field Programmable Gate Arrays (FPGAs).
The maximum operating frequency for the ISPLSI2032-150LT is 180 MHz.
The maximum propagation delay (tpd) for the ISPLSI2032-150LT is 5.0 ns.
The ISPLSI2032-150LT has 32 Universal I/O pins.
The ISPLSI2032-150LT is built on an advanced 0.35 micron E2CMOS technology.
The ISPLSI2032-150LT is available in a QFP package.