| Distributor | Stock | Pricing | MOQ | PKG | Lead Time | Date Code | On Order Quantity | On Order Delivery | |
|---|---|---|---|---|---|---|---|---|---|
|
56 pcs
|
56 pcs | On Request | 1 | On Request | On Request | On Request | On Request | On Request |
| Category | |
| Manufacturer Name | |
| Halogen Free | |
| Lead Style | |
| Mounting Type | |
| Operating Voltage | |
| Propagation Delay |
The Lattice Semiconductor ispLSI 1000 Family CPLD, specifically the ISPLSI1032E-70LTN, is a high-density programmable logic device designed for flexible system implementation. It offers 384 registers and 128 universal I/O pins, providing ample resources for complex logic designs.
This CPLD operates at a maximum frequency of 90 MHz with a propagation delay of 12 ns, ensuring high-speed performance. It is in-system programmable (ISP) using a 5V supply, facilitating easier debugging and faster time-to-market. The device supports IEEE 1149.1 Boundary Scan Test protocol.
Key features include a global routing pool for complete inter-connectivity, wide input gating for fast counters and state machines, and a small logic block size for random logic. The device is manufactured using high-performance E CMOS technology and is 100% tested at the time of manufacture. It is suitable for applications requiring the density and flexibility of FPGAs combined with the ease of use and speed of PLDs.
| Qty | Low | High |
|---|---|---|
| 1+ | $0.50 | $0.50 |
Estimated market price range - modelled values for guidance only, not live distributor offers.
The maximum operating frequency is 90 MHz.
The propagation delay is 12 ns.
It has 384 registers.
There are 128 universal I/O pins.
The device is in-system programmable using a 5V supply.
It is RoHS3 Compliant.
The MSL is 1 Unlimited.