| Distributor | Stock | Pricing | MOQ | PKG | Lead Time | Date Code | On Order Quantity | On Order Delivery | |
|---|---|---|---|---|---|---|---|---|---|
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100 pcs
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100 pcs | On Request | 1 | On Request | On Request | On Request | On Request | On Request |
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| AEC Qualified | |
| Automotive Grade | |
| Industrial Grade | |
| Medical Grade | |
| Military Grade | |
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| Tape & Reel |
The Lattice Semiconductor ISPLSI1024-60LJI is part of the ispLSI 1000 family of High-Density Programmable Logic Devices. This CPLD offers 11000 PLD Gates and 384 Registers, providing ample logic capacity for complex designs. It features 128 Universal I/O pins and five Dedicated Clock Input Pins, supporting flexible system integration.
With a maximum operating frequency of 90 MHz and a propagation delay of 12 ns, the ISPLSI1024-60LJI delivers high performance. It utilizes high-performance E CMOS technology and is electrically erasable and reprogrammable. The device is 5V In-System Programmable (ISP) using Lattice ISP or Boundary Scan Test (IEEE 1149.1) protocols, facilitating easier debugging and faster time-to-market.
This CPLD is designed for applications requiring the ease of use and fast system speed of PLDs combined with the density and flexibility of Field Programmable Gate Arrays. It can combine glue logic and structured designs, offering enhanced pin locking capability and optimized global routing for complete inter-connectivity.
| Qty | Low | High |
|---|---|---|
| 1+ | $0.50 | $0.50 |
Estimated market price range - modelled values for guidance only, not live distributor offers.
The maximum operating frequency is 90 MHz.
The propagation delay is 12 ns.
It has 128 Universal I/O pins.
The operating voltage is 5V.
The RoHS status is RoHS3 Compliant.
The Moisture Sensitivity Level is 1 Unlimited.
The REACH status is REACH Unaffected.