| Distributor | Stock | Pricing | MOQ | PKG | Lead Time | Date Code | On Order Quantity | On Order Delivery | |
|---|---|---|---|---|---|---|---|---|---|
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450 pcs
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450 pcs | On Request | 1 | On Request | On Request | On Request | On Request | On Request | |
|
34 pcs
|
34 pcs | On Request | 1 | On Request | On Request | 99+TP/ | On Request | On Request |
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| Delay Time tpd(1) Max | |
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| Number of I | |
| Number of Logic Elements | |
| Number of Macrocells | |
| Operating Temperature | |
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| Programmable Type | |
| Supplier Device Package | |
| Voltage Supply |
The Lattice Semiconductor ISPLSI 2128VE-100LT100 is a 3.3V In-System Programmable SuperFAST High Density PLD. It offers 6000 PLD gates and 128 macrocells, with 64 I/O pins available. The device supports in-system programmability via a Boundary Scan Test Access Port (TAP) and is IEEE 1149.1 boundary scan testable.
Key electrical specifications include a maximum propagation delay of 10 ns and a maximum operating frequency of 250 MHz. The operating voltage range is 3V to 3.6V. The device is designed for high-speed applications and offers flexibility with its programmable logic.
This CPLD is packaged in a 100-TQFP (14x14) and is designed for surface mounting. The operating temperature range is 0°C to 70°C (TA). Its non-volatile, electrically erasable and reprogrammable nature allows for reconfigurable systems and faster prototyping.
Features include 128 registers, eight dedicated input pins, three dedicated clock input pins, and a global routing pool for complete interconnectivity. The ispLSI 2128VE architecture interfaces with standard 5V TTL devices.
The maximum propagation delay is 10 ns.
The operating voltage range is 3V to 3.6V.
The operating temperature range is 0°C to 70°C (TA).
The device has 128 macrocells.
It is supplied in a 100-TQFP package.