| Distributor | Stock | Pricing | MOQ | PKG | Lead Time | Date Code | On Order Quantity | On Order Delivery | |
|---|---|---|---|---|---|---|---|---|---|
|
3,958 pcs
|
3958 pcs | On Request | 1 | On Request | On Request | 16+ | On Request | On Request | |
|
960 pcs
|
960 pcs | On Request | 1 | On Request | On Request | 16+ | On Request | On Request |
| Category | |
| Manufacturer Name | |
| Delay Time tpd(1) Max | |
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| Number of Gates | |
| Number of I | |
| Number of Logic Elements | |
| Number of Macrocells | |
| Operating Temperature | |
| Programmable Type | |
| Supplier Device Package | |
| Voltage Supply |
The Lattice Semiconductor ISPLSI 2096A-100LTN128 is a Complex Programmable Logic Device (CPLD) from the ispLSI 2000A series. It provides 4000 PLD gates and 96 macrocells, making it suitable for high-density logic integration.
This CPLD features 96 I/O pins and supports in-system programming (ISP™) with a 5V supply range of 4.75V to 5.25V. It offers a maximum operating frequency of 125 MHz and a propagation delay of 7.5 ns according to the datasheet, though the manufacturer page lists 10 ns. The device operates within a temperature range of 0°C to 70°C (TA).
Designed for embedded applications, the ISPLSI 2096A-100LTN128 comes in a 128-TQFP package suitable for surface mounting. Its architecture includes a Global Routing Pool (GRP) for complete interconnectivity between logic blocks and I/O pins. The device is electrically erasable and reprogrammable, offering flexibility for design modifications and prototyping.
This CPLD is built on a 0.35 micron E2CMOS® technology. It is 100% tested at the time of manufacture and includes features like unused product term shutdown to save power. The device offers TTL compatible inputs and outputs.
125 MHz
The maximum propagation delay is 7.5 ns according to datasheet specifications.
96 I/O pins
4.75V to 5.25V
128-TQFP (14x14)
0°C to 70°C
Yes, it is RoHS3 compliant.
