| Distributor | Stock | Pricing | MOQ | PKG | Lead Time | Date Code | On Order Quantity | On Order Delivery | |
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135 pcs
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135 pcs | On Request | 1 | On Request | On Request | 1305+ | On Request | On Request |
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The Lattice Semiconductor Corporation ISPLSI 2064A-100LJ84 is a high-density, in-system programmable Complex Programmable Logic Device (CPLD). It features 64 macrocells, 2000 PLD gates, and 64 I/O pins, making it suitable for various logic integration tasks.
This CPLD operates with a supply voltage range of 4.75V to 5.25V and has a maximum operating frequency of 125 MHz. The propagation delay (tpd) is 10 ns, and it offers 16 logic elements. The device is designed for in-system programmability, allowing for easier prototyping and updates.
Packaged in an 84-PLCC (J-Lead) format, the ISPLSI 2064A-100LJ84 is designed for surface mounting. It operates within a temperature range of 0°C to 70°C (TA). The device is built on a 0.35 micron E2CMOS technology and is electrically erasable and reprogrammable.
Key specifications include 64 registers, four dedicated input pins, and three dedicated clock input pins. The Global Routing Pool (GRP) provides comprehensive interconnectivity. The ispLSI 2064A is fully form and function compatible with the ispLSI 2064, featuring identical timing specifications and packaging.
The propagation delay (tpd) for the ISPLSI 2064A-100LJ84 is 10 ns.
The supply voltage range for the ISPLSI 2064A-100LJ84 is 4.75V to 5.25V.
The operating temperature range is 0°C to 70°C (TA).
This device is supplied in an 84-PLCC (J-Lead) package for surface mounting.
The ISPLSI 2064A-100LJ84 features 64 macrocells.
The maximum operating frequency (fmax) is 125 MHz.