ISPLSI 2064A-100LJ84 The Lattice Semiconductor Corporation ISPLSI 2064A-100LJ84 is a Complex Programmable Logic Device (CPLD) with 64 macrocells and 2000 gates. It offers a propagation delay of 10 ns.
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ISPLSI 2064A-100LJ84

Available from 1 distributors
Mfr Name: Lattice Semiconductor Corporation
Lattice Semiconductor Corporation
The Lattice Semiconductor Corporation ISPLSI 2064A-100LJ84 is a Complex Programmable Logic Device (CPLD) with 64 macrocells and 2000 gates. It offers a propagation delay of 10 ns.
✓ Total Stock: 135 pcs

ISPLSI 2064A-100LJ84 Available from 1 distributor

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ISPLSI 2064A-100LJ84 Specifications Quick View

Most important parameters for selection – full specs in datasheet.
Category
Manufacturer Name
Delay Time tpd(1) Max
Lead Spacing
Lead Style
Mounting Type
Number of Gates
Number of I
Number of I/O
Number of Logic Elements
Number of Macrocells
Operating Temperature
Programmable Type
Supplier Device Package
Supply Voltage
Voltage Supply

ISPLSI 2064A-100LJ84 Description

Short technical summary and product information.

The Lattice Semiconductor Corporation ISPLSI 2064A-100LJ84 is a high-density, in-system programmable Complex Programmable Logic Device (CPLD). It features 64 macrocells, 2000 PLD gates, and 64 I/O pins, making it suitable for various logic integration tasks.

 

This CPLD operates with a supply voltage range of 4.75V to 5.25V and has a maximum operating frequency of 125 MHz. The propagation delay (tpd) is 10 ns, and it offers 16 logic elements. The device is designed for in-system programmability, allowing for easier prototyping and updates.

 

Packaged in an 84-PLCC (J-Lead) format, the ISPLSI 2064A-100LJ84 is designed for surface mounting. It operates within a temperature range of 0°C to 70°C (TA). The device is built on a 0.35 micron E2CMOS technology and is electrically erasable and reprogrammable.

 

Key specifications include 64 registers, four dedicated input pins, and three dedicated clock input pins. The Global Routing Pool (GRP) provides comprehensive interconnectivity. The ispLSI 2064A is fully form and function compatible with the ispLSI 2064, featuring identical timing specifications and packaging.

ISPLSI 2064A-100LJ84 Quick Information

Product Type: CPLD
Series: 2064A
Canonical Name: Lattice Semiconductor Corporation ISPLSI 2064A-100LJ84 Complex Programmable Logic Device
Subcategory: Complex Programmable Logic Devices

ISPLSI 2064A-100LJ84 Compliance

RoHS Status: RoHS Compliant
Moisture Sensitivity Level (MSL): 1 Unlimited
REACH Status: REACH Unaffected

ISPLSI 2064A-100LJ84 Features

  • 64 macrocells and 2000 PLD gates
  • 10 ns propagation delay
  • 5V in-system programmability
  • 84-PLCC surface mount package
  • 0°C to 70°C operating temperature

ISPLSI 2064A-100LJ84 Applications

  • Ideal for glue logic integration
  • Suitable for state machine designs
  • Used in fast counter applications
  • Supports address decoder functions
  • Flexible pin placement designs

ISPLSI 2064A-100LJ84 FAQs

6 frequently asked questions generated from this part’s specifications.
What is the propagation delay of the ISPLSI 2064A-100LJ84?

The propagation delay (tpd) for the ISPLSI 2064A-100LJ84 is 10 ns.

What is the operating voltage range for this CPLD?

The supply voltage range for the ISPLSI 2064A-100LJ84 is 4.75V to 5.25V.

What is the operating temperature range?

The operating temperature range is 0°C to 70°C (TA).

What package type is the ISPLSI 2064A-100LJ84 supplied in?

This device is supplied in an 84-PLCC (J-Lead) package for surface mounting.

How many macrocells does this CPLD have?

The ISPLSI 2064A-100LJ84 features 64 macrocells.

What is the maximum operating frequency?

The maximum operating frequency (fmax) is 125 MHz.

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