| Distributor | Stock | Pricing | MOQ | PKG | Lead Time | Date Code | On Order Quantity | On Order Delivery | |
|---|---|---|---|---|---|---|---|---|---|
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6 pcs
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6 pcs | On Request | 1 | On Request | On Request | 0206/0304TP/ | On Request | On Request |
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| Manufacturer Name | |
| Density | |
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| Number of Pins | |
| Voltage |
The SK HYNIX HY57V643220CT-6 is a high-bandwidth CMOS Synchronous DRAM (SDRAM) with a density of 67,108,864 bits. It is organized into 4 banks, each with a capacity of 524,288 words by 32 bits, providing a total data width of 32 bits.
This SDRAM is designed for memory applications requiring wide data I/O and high bandwidth. It operates with fully synchronous operations referenced to the positive edge of the clock. All inputs and outputs are compatible with LVTTL interfaces.
The component is housed in a TSSOP package with 86 pins. It is suitable for various memory applications where performance and capacity are critical. The device supports auto refresh and self-refresh functionalities, with 8192 refresh cycles required every 64ms.
| Qty | Low | High |
|---|---|---|
| 1+ | $1.28 | $1.28 |
Estimated market price range - modelled values for guidance only, not live distributor offers.
It is a Synchronous DRAM (SDRAM).
The density is 64-Mbit (67,108,864 bits).
It is organized as 4 banks of 512K x 32-bit.
The data width is 32-bit.
The operating voltage is 3.3V.
The interface is LVTTL.
The package is 86-pin TSSOP.