| Distributor | Stock | Pricing | MOQ | PKG | Lead Time | Date Code | On Order Quantity | On Order Delivery | |
|---|---|---|---|---|---|---|---|---|---|
|
4,100 pcs
|
4100 pcs | On Request | 1 | On Request | On Request | 0950+ | On Request | On Request | |
|
2,774 pcs
|
2774 pcs | On Request | 1 | On Request | On Request | On Request | On Request | On Request | |
|
1,122 pcs
|
1122 pcs | On Request | 1 | On Request | On Request | On Request | On Request | On Request | |
|
184 pcs
|
184 pcs | On Request | 1 | On Request | On Request | 24+ | On Request | On Request | |
|
34 pcs
|
34 pcs | On Request | 1 | On Request | On Request | On Request | On Request | On Request |
| Category | |
| Manufacturer Name | |
| Delay Time tpd(1) Max | |
| Lead Spacing | |
| Mounting Type | |
| Number of Macrocells | |
| Operating Temperature | |
| Programmable Type | |
| Supplier Device Package | |
| Voltage Supply |
The Lattice Semiconductor GAL16V8D-25LPN is a high-performance E2CMOS CPLD featuring 8 macrocells and a maximum propagation delay of 25 ns. It operates within a supply voltage range of 4.75V to 5.25V and is designed for through-hole mounting.
This device utilizes EE PLD technology, offering reconfigurable and reprogrammable cells. It has an operating temperature range of 0°C to 75°C (TA). The CPLD is packaged in a 20-PDIP format, with a standard DIP (0.300", 7.62mm) case.
Key electrical characteristics include a maximum propagation delay from clock input to data output of 3.0 ns and a maximum operating frequency of 250 MHz. The device also features active pull-ups on all pins and is built with UltraMOS Advanced CMOS Technology.
The maximum propagation delay is 25 ns.
The supply voltage ranges from 4.75V to 5.25V.
The operating temperature range is 0°C to 75°C (TA).
It has 8 macrocells.
This is an EE PLD.
It is a 20-PDIP package designed for through-hole mounting.
The maximum operating frequency is 250 MHz.