| Distributor | Stock | Pricing | MOQ | PKG | Lead Time | Date Code | On Order Quantity | On Order Delivery | |
|---|---|---|---|---|---|---|---|---|---|
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3,400 pcs
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3400 pcs | On Request | 1 | On Request | On Request | On Request | On Request | On Request |
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| Delay Time tpd(1) Max | |
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| Voltage Supply |
The Intel EPM7512AEQC208-10 is a high-performance, 3.3-V EEPROM-based programmable logic device (PLD) belonging to the MAX 7000A family. Built on a second-generation Multiple Array MatriX (MAX) architecture, this CPLD offers 10,000 usable gates and 512 macrocells.
Key electrical specifications include a maximum pin-to-pin logic delay of 4.5 ns and counter frequencies up to 227.3 MHz. The device supports a MultiVoltTM I/O interface, allowing the core to run at 3.3 V while I/O pins are compatible with 5.0-V, 3.3-V, and 2.5-V logic levels. It features in-system programmability (ISP) via an IEEE 1149.1 JTAG interface and includes boundary-scan test (BST) circuitry compliant with IEEE 1149.1.
This CPLD is available in a 208-pin PQFP package, suitable for surface mounting. The operating temperature range is 0°C to 70°C (TA). The device supports in-system programming and offers features like programmable interconnect array for predictable performance and bus-friendly architecture with programmable slew-rate control.
The maximum pin-to-pin logic delay is 4.5 ns.
The internal voltage supply ranges from 3 V to 3.6 V.
It is supplied in a 208-PQFP (28x28) package.
The operating temperature range is 0°C to 70°C (TA).
The device has 512 macrocells.
There are 176 I/O pins.
The device has 10000 gates.