| Distributor | Stock | Pricing | MOQ | PKG | Lead Time | Date Code | On Order Quantity | On Order Delivery | |
|---|---|---|---|---|---|---|---|---|---|
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2,568 pcs
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2568 pcs | On Request | 1 | On Request | On Request | On Request | On Request | On Request | |
|
502 pcs
|
502 pcs | On Request | 1 | On Request | On Request | On Request | On Request | On Request |
| Category | |
| Manufacturer Name | |
| Delay Time tpd(1) Max | |
| Lead Spacing | |
| Mounting Type | |
| Number of Gates | |
| Number of I | |
| Number of Logic Elements | |
| Number of Macrocells | |
| Operating Temperature | |
| Programmable Type | |
| Supplier Device Package | |
| Tape & Reel | |
| Voltage Supply |
The Intel EPM7256AETI100-7N is a complex programmable logic device (CPLD) from the MAX 7000AE family, built on a second-generation Multiple Array MatriX (MAX) architecture. This high-performance, 3.3V device offers 256 macrocells and 5000 gates, with a fast pin-to-pin logic delay of 4.5 ns and a counter frequency of up to 227.3 MHz.
Designed for in-system programmability (ISP) via an IEEE 1149.1 JTAG interface, the EPM7256AETI100-7N operates at 3.3V core voltage while supporting MultiVolt I/O for compatibility with 5.0V, 3.3V, and 2.5V logic levels. It features 84 I/O pins and is housed in a 100-TQFP (14x14) surface mount package.
Key features include a programmable interconnect array (PIA) for predictable performance, bus-friendly architecture with slew-rate control, and an open-drain output option. The device supports hot-socketing and has programmable power-saving modes for reduced power consumption.
The operating voltage supply for this device is between 3V and 3.6V.
The EPM7256AETI100-7N is supplied in a 100-TQFP (14x14) surface mount package.
The operating temperature range is -40°C to 85°C (TA).
The RoHS status is RoHS3 Compliant.
The maximum propagation delay is 7.5 ns.
The device features 256 macrocells.