| Distributor | Stock | Pricing | MOQ | PKG | Lead Time | Date Code | On Order Quantity | On Order Delivery | |
|---|---|---|---|---|---|---|---|---|---|
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3 pcs
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3 pcs | On Request | 1 | On Request | On Request | On Request | On Request | On Request |
| Category | |
| Manufacturer Name | |
| Delay Time tpd(1) Max | |
| Mounting Type | |
| Number of Gates | |
| Number of I | |
| Number of Logic Elements | |
| Number of Macrocells | |
| Operating Temperature | |
| Programmable Type | |
| Supplier Device Package | |
| Supplier Package | |
| Tape & Reel | |
| Voltage Supply |
The Intel EPM7256AETC144-10N is a 3.3V EEPROM-based Complex Programmable Logic Device (CPLD) built on the second-generation Multiple Array MatriX (MAX) architecture. It offers high performance with pin-to-pin logic delays of 4.5 ns and counter frequencies up to 227.3 MHz.
This device features 256 macrocells, 16 logic elements, and 5000 gates, with a maximum propagation delay of 10 ns. The voltage supply range is 3V to 3.6V, and it supports a MultiVolt I/O interface, allowing I/O pins to be compatible with 5.0V, 3.3V, and 2.5V logic levels. The operating temperature range is 0°C to 70°C (TA).
Designed for in-system programmability (ISP) via an IEEE 1149.1 JTAG interface, the EPM7256AETC144-10N is pin-compatible with 5.0V MAX 7000S devices. It includes built-in boundary-scan test (BST) circuitry and supports JEDEC Jam Standard Test and Programming Language (STAPL).
The CPLD is housed in a 144-TQFP (20x20) package and utilizes surface mount technology. It offers 120 I/O pins and supports hot-socketing.
The operating voltage supply range is 3V to 3.6V.
It is supplied in a 144-LQFP package.
The operating temperature range is 0°C to 70°C (TA).
The RoHS status is RoHS3 Compliant.
The maximum propagation delay is 10 ns.
It has 256 macrocells.