| Distributor | Stock | Pricing | MOQ | PKG | Lead Time | Date Code | On Order Quantity | On Order Delivery | |
|---|---|---|---|---|---|---|---|---|---|
|
3,012 pcs
|
3012 pcs | On Request | 1 | On Request | On Request | On Request | On Request | On Request |
| Category | |
| Manufacturer Name | |
| Delay Time tpd(1) Max | |
| Mounting Type | |
| Number of Gates | |
| Number of I | |
| Number of Logic Elements | |
| Number of Macrocells | |
| Operating Temperature | |
| Programmable Type | |
| Supplier Device Package | |
| Supplier Package | |
| Voltage Supply |
The Intel EPM7256AETC100-10 is a Complex Programmable Logic Device (CPLD) built on Altera's second-generation MAX architecture. This EEPROM-based PLD operates at 3.3V and provides a density of 5000 usable gates and 256 macrocells.
Key electrical specifications include a maximum propagation delay of 10 ns and a maximum counter frequency of 227.3 MHz. The device supports in-system programmability (ISP) and features a MultiVolt I/O interface, allowing compatibility with 5.0V, 3.3V, and 2.5V logic levels. The operating temperature range is 0°C to 70°C (TA).
This CPLD is supplied in a 100-TQFP package and utilizes surface mount technology. It is pin-compatible with 5.0V MAX 7000S devices and offers features like boundary-scan test circuitry compliant with IEEE Std. 1149.1.
The operating voltage is 3V to 3.6V.
It is supplied in a 100-TQFP package.
The operating temperature range is 0°C to 70°C (TA).
The RoHS status is RoHS3 Compliant.
The maximum propagation delay is 10 ns.
It has 256 macrocells.