EPM7128S-15ES The Altera EPM7128S-15ES is a high-density, high-performance CPLD from the MAX 7000 family. It offers fast performance with pin-to-pin delays as low as 5 ns.
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EPM7128S-15ES

Available from 1 distributors
Mfr Name: Altera
Altera
The Altera EPM7128S-15ES is a high-density, high-performance CPLD from the MAX 7000 family. It offers fast performance with pin-to-pin delays as low as 5 ns.
Total Stock: 4 pcs
$ Price Range: $0.50

EPM7128S-15ES Available from 1 distributor

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EPM7128S-15ES Specifications Quick View

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EPM7128S-15ES Description

Short technical summary and product information.

The Altera EPM7128S-15ES is a Complex Programmable Logic Device (CPLD) belonging to the MAX 7000 family. Based on Altera's second-generation MAX architecture and fabricated with advanced CMOS technology, this EEPROM-based device provides a density range of 600 to 5,000 usable gates.

 

Key electrical specifications include pin-to-pin delays as fast as 5 ns and counter speeds up to 175.4 MHz. It supports 5.0-V in-system programmability (ISP) through an IEEE Std. 1149.1 Joint Test Action Group (JTAG) interface, with ISP circuitry compatible with IEEE Std. 1532. The device also features built-in JTAG boundary-scan test (BST) circuitry.

 

Packaged in a QFP form factor, the EPM7128S-15ES is suitable for various embedded applications requiring flexible logic implementation. Its design emphasizes high performance and in-system configurability.

EPM7128S-15ES Quick Information

Product Type: CPLD
Series: MAX 7000S
Canonical Name: Altera MAX 7000S EPM7128S-15ES CPLD
Subcategory: Programmable Logic Device

EPM7128S-15ES Compliance

RoHS Status: RoHS Compliant
Moisture Sensitivity Level (MSL): 1 Unlimited
REACH Status: REACH Unaffected

EPM7128S-15ES Estimated Pricing

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1+ $0.50 $0.50

Estimated market price range - modelled values for guidance only, not live distributor offers.

EPM7128S-15ES Features

  • High-density, high-performance CPLD.
  • Fast 5 ns pin-to-pin delay.
  • Up to 175.4 MHz counter speed.
  • 5.0-V In-System Programmability (ISP).
  • JTAG interface for programming and testing.

EPM7128S-15ES Applications

  • Ideal for flexible logic designs.
  • Suitable for embedded systems.
  • Used in high-speed digital circuits.
  • Supports in-system configuration.

EPM7128S-15ES FAQs

4 frequently asked questions generated from this part’s specifications.
What is the pin-to-pin delay for the EPM7128S-15ES?

The pin-to-pin delay is as fast as 5 ns.

What is the maximum counter speed for the EPM7128S-15ES?

The counter speed is up to 175.4 MHz.

Does the EPM7128S-15ES support in-system programmability?

Yes, it supports 5.0-V in-system programmability (ISP) through the built-in IEEE Std. 1149.1 Joint Test Action Group (JTAG) interface.

What package type is the EPM7128S-15ES available in?

The EPM7128S-15ES is available in a QFP package.

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