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EPM7064LC68-7 The Altera EPM7064LC68-7 is a high-density, high-performance CPLD based on the second-generation MAX architecture. It offers 5000 usable gates and a pin-to-pin delay as fast as 5 ns.
Mfr Part #:

EPM7064LC68-7

Available from 1 distributors
Mfr Name: Altera
Altera
The Altera EPM7064LC68-7 is a high-density, high-performance CPLD based on the second-generation MAX architecture. It offers 5000 usable gates and a pin-to-pin delay as fast as 5 ns.
✓ Total Stock: 1 pcs
$ Price Range: $0.50

EPM7064LC68-7 Available from 1 distributor

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Speed Components Ltd ✓
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1 pcs
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1 pcs On Request 1 On Request On Request 9731 On Request On Request
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EPM7064LC68-7 Specifications Quick View

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EPM7064LC68-7 Description

Short technical summary and product information.

The Altera EPM7064LC68-7 is a Complex Programmable Logic Device (CPLD) from the MAX 7000 family, built on advanced CMOS technology. This EEPROM-based device provides up to 5,000 usable gates, supporting in-system programmability (ISP) via an IEEE 1149.1 JTAG interface.

 

Key electrical specifications include a fast pin-to-pin delay of 5 ns and a counter speed of up to 175.4 MHz. The device operates with 5.0-V ISP circuitry. It is fabricated using advanced CMOS technology.

 

The EPM7064LC68-7 is supplied in a PLCC package. Some devices in the MAX 7000 family, including specific speed grades of the EPM7064LC68-7, comply with the PCI Local Bus Specification, Revision 2.2.

 

This CPLD is suitable for various digital logic applications requiring high-density programmable logic.

EPM7064LC68-7 Quick Information

Product Type: CPLD
Series: MAX 7000
Canonical Name: Altera MAX 7000 EPM7064LC68-7 CPLD
Subcategory: Complex Programmable Logic Devices

EPM7064LC68-7 Compliance

RoHS Status: RoHS Compliant
Moisture Sensitivity Level (MSL): 1 Unlimited
REACH Status: REACH Unaffected
Lead Free: Yes

EPM7064LC68-7 Estimated Pricing

Qty Low High
1+ $0.50 $0.50

Estimated market price range - modelled values for guidance only, not live distributor offers.

EPM7064LC68-7 Features

  • High-density MAX 7000 CPLD.
  • Up to 5000 usable gates.
  • Fast 5 ns pin-to-pin delay.
  • 5.0-V in-system programmability.
  • PLCC package for integration.

EPM7064LC68-7 Applications

  • Used in glue logic and state machine implementations.
  • Ideal for high-speed control applications.
  • Suitable for prototyping and low-volume production.
  • Can be used in telecommunications and networking equipment.

EPM7064LC68-7 FAQs

7 frequently asked questions generated from this part’s specifications.
What is the package type of the EPM7064LC68-7?

PLCC package.

What programmable logic family does the EPM7064LC68-7 belong to?

MAX 7000 family.

How many usable gates does the EPM7064LC68-7 have?

5000 usable gates.

What is the pin-to-pin delay of the EPM7064LC68-7?

5 ns (fastest).

What is the maximum counter speed of the EPM7064LC68-7?

175.4 MHz.

Does the EPM7064LC68-7 support in-system programmability?

Yes, at 5.0V.

Does the EPM7064LC68-7 have a JTAG interface?

Yes, with boundary-scan test circuitry.

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