| Distributor | Stock | Pricing | MOQ | PKG | Lead Time | Date Code | On Order Quantity | On Order Delivery | |
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10 pcs
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10 pcs | On Request | 1 | On Request | On Request | On Request | On Request | On Request | |
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6 pcs
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6 pcs | On Request | 1 | On Request | On Request | On Request | On Request | On Request |
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| SVHC Present |
The Altera EPM5192JC-1 is a Complex Programmable Logic Device (CPLD) from the MAX 5000 family. It features 192 macro cells and 3.75K logic gates, with an operating frequency of 62.5MHz and a nominal operating voltage of 5V.
This CPLD offers a combinatorial delay of 15 ns and supports counter frequencies and pipelined data rates up to 100 MHz. For high-complexity designs, it can achieve system clock rates up to 66 MHz. The device is available in a PLCC84 package and is designed for surface mount applications.
As an obsolete part, the EPM5192JC-1 is sourced from factory excess stock or franchised distributors. It serves as a high-speed, high-density replacement for SSI and MSI TTL and CMOS packages, integrating subsystems to save board area and reduce power consumption.
| Qty | Low | High |
|---|---|---|
| 1+ | $0.50 | $0.50 |
Estimated market price range - modelled values for guidance only, not live distributor offers.
The EPM5192JC-1 has 3.75K gates.
The EPM5192JC-1 features 192 macro cells.
The EPM5192JC-1 operates at a frequency of 62.5 MHz.
The EPM5192JC-1 requires a 5V operating voltage.
The EPM5192JC-1 is available in a PLCC84 package.
The EPM5192JC-1 is RoHS3 Compliant.
The Moisture Sensitivity Level (MSL) for the EPM5192JC-1 is 1 Unlimited.