| Distributor | Stock | Pricing | MOQ | PKG | Lead Time | Date Code | On Order Quantity | On Order Delivery | |
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2 pcs
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2 pcs | On Request | 1 | On Request | On Request | On Request | On Request | On Request |
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| Tape & Reel |
The Altera EPM5032PC-25 is an Erasable Programmable Logic Device (EPLD) belonging to the MAX 5000 family. This CPLD is designed as a high-speed, high-density replacement for SSI and MSI TTL and CMOS packages, as well as conventional PLDs. It integrates subsystems into a single package, saving board area and reducing power consumption.
Key electrical specifications include a 15 ns combinatorial delay, counter frequencies up to 100 MHz, and pipelined data rates of 100 MHz. High-complexity designs can achieve true system clock rates up to 66 MHz. The device is housed in a DIP-28 package.
This EPLD is UV-Erasable/OTP. It is noted as obsolete and available as factory excess stock or from franchised distributors. Development tools like MAX+PLUS and MAX+PLUS II are available for compiling large designs.
| Qty | Low | High |
|---|---|---|
| 1+ | $0.50 | $0.50 |
Estimated market price range - modelled values for guidance only, not live distributor offers.
The combinatorial delay is 15 ns.
The counter frequency is up to 100 MHz.
The pipelined data rate is 100 MHz.
The system clock rate is up to 66 MHz.
The EPM5032PC-25 is available in a DIP-28 package.
The RoHS status is RoHS3 Compliant.
The MSL is Level 1.