| Distributor | Stock | Pricing | MOQ | PKG | Lead Time | Date Code | On Order Quantity | On Order Delivery | |
|---|---|---|---|---|---|---|---|---|---|
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3,000 pcs
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3000 pcs | On Request | 1 | On Request | On Request | 18+ | On Request | On Request | |
|
355 pcs
|
355 pcs | On Request | 1 | On Request | On Request | 17371719+ | On Request | On Request | |
|
14 pcs
|
14 pcs | On Request | 1 | On Request | On Request | On Request | On Request | On Request |
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The Altera EPM3256ATC144-7N is a CPLD (Complex Programmable Logic Device) belonging to the MAX 3000A family. Built on a MAX architecture, this device utilizes CMOS EEPROM technology for high performance and low cost.
Key specifications include 5000 usable gates and 256 macrocells, with a maximum user I/O pin count of 161. It features a fast pin-to-pin logic delay of 7.5 ns and a counter frequency of up to 126.6 MHz. The device supports a 3.3V core voltage and offers MultiVolt I/O compatibility for 5.0V, 3.3V, and 2.5V logic levels.
Designed for industrial temperature ranges, the EPM3256ATC144-7N comes in a 144-TQFP package suitable for surface mounting. It includes features like in-system programmability via JTAG, boundary scan test circuitry, and programmable security bits for design protection. The CPLD also supports hot-socketing and has a programmable interconnect array for predictable performance.
| Qty | Low | High |
|---|---|---|
| 1+ | $2.50 | $2.50 |
Estimated market price range - modelled values for guidance only, not live distributor offers.
The EPM3256ATC144-7N is a CPLD (Complex Programmable Logic Device) from Altera's MAX 3000A family.
The EPM3256ATC144-7N has 5000 usable gates.
The maximum pin-to-pin logic delay for the EPM3256ATC144-7N is 7.5 ns.
The EPM3256ATC144-7N's I/O pins are compatible with 5.0V, 3.3V, and 2.5V logic levels.
The EPM3256ATC144-7N operates within an industrial temperature range.
The EPM3256ATC144-7N is supplied in a 144-TQFP package.