EPM3128ATC144-7N

The Altera EPM3128ATC144-7N is a Complex Programmable Logic Device (CPLD) belonging to the MAX 3000A family. Built on a MAX architecture using advanced CMOS technology, this EEPROM-based PLD offers a balance of performance and cost-effectiveness. It features 128 macrocells and provides up to 2500 usable gates, with a pin-to-pin logic delay of 4.5 ns and a maximum counter frequency of 227.3 MHz.

This device supports 3.3-V in-system programmability (ISP) via an IEEE Std. 1149.1 JTAG interface and includes boundary-scan test circuitry compliant with IEEE Std. 1149.1-1990. The MultiVoltTM I/O interface allows the core to operate at 3.3 V while supporting I/O compatibility with 5.0-V, 3.3-V, and 2.5-V logic levels. It is supplied in a 144-TQFP package suitable for surface mounting.

Additional features include hot-socketing support, a programmable interconnect array (PIA) for predictable performance, and an industrial temperature range. The device is PCI compatible and offers a bus-friendly architecture with programmable slew-rate control. Software design support is available through Altera's development systems.