| Distributor | Stock | Pricing | MOQ | PKG | Lead Time | Date Code | On Order Quantity | On Order Delivery | |
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693 pcs
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693 pcs | On Request | 1 | On Request | On Request | 17+ | On Request | On Request | |
|
169 pcs
|
169 pcs | On Request | 1 | On Request | On Request | On Request | On Request | On Request |
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The Altera MAX 3000A family, including the EPM3064ATC44-4N, offers high-performance, low-cost CMOS EEPROM-based programmable logic devices (PLDs). Built on a MAX architecture, these devices range from 600 to 10,000 usable gates. The EPM3064ATC44-4N specifically provides 1,250 usable gates and 64 macrocells.
Key electrical specifications include a fast 4.5ns pin-to-pin logic delay and a maximum counter frequency of up to 227.3 MHz. The device supports a 3.3V in-system programmability (ISP) through an IEEE Std. 1149.1 JTAG interface. Its MultiVolt I/O interface allows the core to run at 3.3V while I/O pins are compatible with 5.0V, 3.3V, and 2.5V logic levels.
Designed for industrial temperature ranges, the EPM3064ATC44-4N is available in various packages, including TQFP, PQFP, PLCC, and FineLine BGA. It supports hot-socketing and features a programmable interconnect array (PIA) for fast, predictable performance. Additional features include PCI compatibility, bus-friendly architecture with programmable slew-rate control, and an open-drain output option.
| Qty | Low | High |
|---|---|---|
| 1+ | $0.50 | $0.50 |
Estimated market price range - modelled values for guidance only, not live distributor offers.
The pin-to-pin logic delay is 4.5 ns.
The maximum counter frequency is 227.3 MHz.
The device has 1,250 usable gates.
It features 64 macrocells.
The device core operates at 3.3V, and its I/O pins are compatible with 5.0V, 3.3V, and 2.5V logic levels.
It is supplied in a 100-LQFP package and is surface mountable.