| Distributor | Stock | Pricing | MOQ | PKG | Lead Time | Date Code | On Order Quantity | On Order Delivery | |
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4,000 pcs
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4000 pcs | On Request | 1 | On Request | On Request | On Request | On Request | On Request | |
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1,507 pcs
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1507 pcs | On Request | 1 | On Request | On Request | On Request | On Request | On Request |
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The DS33Z11 from Analog Devices / Maxim Integrated is a specialized interface IC that extends 10/100 Ethernet LAN segments. It achieves this by encapsulating MAC frames in HDLC or X.86 (LAPS) for transmission over PDH/TDM data streams. The device supports bidirectional synchronous interconnect up to 52Mbps.
Key features include a 10/100 IEEE 802.3 Ethernet MAC with MII and RMII support, and a 52Mbps synchronous TDM serial port with independent transmit and receive timing. It also incorporates HDLC/LAPS encapsulation with programmable FCS and interframe fill. A built-in Committed Information Rate (CIR) controller provides fractional bandwidth allocation in 512kbps increments. The DS33Z11 includes external 16MB, 100MHz SDRAM buffering and offers both SPI and Parallel microprocessor interfaces.
This IC is available in a 169-CSBGA package and supports a voltage range of 1.8V to 3.3V. It is suitable for applications such as Transparent LAN Service, LAN Extension, and Ethernet Delivery over various serial links like T1/E1/J1 and T3/E3.
The DS33Z11 can operate with an external processor, EEPROM, or in a stand-alone hardware mode. It also supports IEEE 1149.1 JTAG for testing.
The DS33Z11 supports a 10/100 IEEE 802.3 Ethernet MAC.
The synchronous TDM serial port supports up to 52Mbps.
It supports HDLC/LAPS encapsulation with programmable FCS and interframe fill.
A built-in Committed Information Rate (CIR) controller provides fractional allocations in 512kbps increments.
The device features external 16MB, 100MHz SDRAM buffering.
The DS33Z11 offers both SPI and Parallel microprocessor interfaces.
The operating voltage range is from 1.8V to 3.3V.