| Distributor | Stock | Pricing | MOQ | PKG | Lead Time | Date Code | On Order Quantity | On Order Delivery | |
|---|---|---|---|---|---|---|---|---|---|
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6,000 pcs
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6000 pcs | On Request | 1 | On Request | On Request | On Request | On Request | On Request |
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The Infineon PSoC™ 64 "Secure Boot" MCU, part number CYB06447BZI-D54, is a high-performance, ultra-low-power, and secured microcontroller platform purpose-built for IoT applications. It provides out-of-box security functionality with an isolated root-of-trust, enabling features like attestation, provisioning services, TLS authentication, secured storage, and secured firmware management.
This MCU features a 32-bit dual CPU subsystem, including a 150-MHz Arm® Cortex®-M4F CPU and a 100-MHz Cortex®-M0+ CPU. It offers user-selectable core logic operation at either 1.1 V or 0.9 V, with active CPU currents as low as 22 µA/MHz for the Cortex-M4 and 15 µA/MHz for the Cortex-M0+ at 0.9 V.
Memory capabilities include 832-KB of application flash with read-while-write support, 32-KB of auxiliary flash, and 32-KB of supervisory flash. It also provides 176-KB of SRAM with power and data retention control, and a 1-Kb eFuse array for one-time programming. The device supports low-power operation from 1.7 V to 3.6 V, with six power modes for fine-grained power management, including a Deep Sleep mode with 7 µA current and 64-KB SRAM retention.
The PSoC™ 64 product line is designed with hardware-based Root-of-Trust (RoT) functionality, ensuring firmware integrity through immutable boot-up code, flash content hash, and Infineon's public key. It supports a flexible chain of trust for secured boot and includes an Infineon Bootloader optimized for the family.
| Qty | Low | High |
|---|---|---|
| 1+ | $0.99 | $0.99 |
Estimated market price range - modelled values for guidance only, not live distributor offers.
It features a 150-MHz Arm Cortex-M4F CPU and a 100-MHz Cortex-M0+ CPU.
The core logic can operate at either 1.1 V or 0.9 V.
There is 832 KB of application flash memory.
It has 176 KB of SRAM with power and data retention control.
The Deep Sleep mode current is 7 µA with 64-KB SRAM retention.