| Distributor | Stock | Pricing | MOQ | PKG | Lead Time | Date Code | On Order Quantity | On Order Delivery | |
|---|---|---|---|---|---|---|---|---|---|
|
2,711 pcs
|
2711 pcs | On Request | 1 | On Request | On Request | On Request | On Request | On Request |
| Category | |
| Manufacturer Name | |
| Differential | |
| Divider | |
| Frequency | |
| Input | |
| Mounting Type | |
| Number of Circuits | |
| Operating Temperature | |
| Output | |
| PLL | |
| Ratio | |
| Supplier Device Package | |
| Tape & Reel | |
| Type | |
| Voltage |
The Cypress Semiconductor CY7B994V-2AXC is a high-speed multi-phase PLL clock buffer designed for high-performance computer and communication systems. It features 18 LVTTL outputs capable of driving 50-ohm terminated lines.
Key electrical specifications include an input/output operation frequency range of 24 MHz to 200 MHz for the CY7B994V variant, a maximum total timing budget window of 500 ps, and matched pair output skew of less than 200 ps. It offers zero input-to-output delay and supports phase adjustments in 625 ps/1300 ps steps up to ±10.4 ns. The device operates from a single 3.3V ±10% supply.
This clock buffer integrates a Phase Locked Loop (PLL) with a lock indicator and provides multiply/divide ratios from 1 to 12. It also features individual output bank disable and an output high impedance option for testing. The CY7B994V-2AXC is available in a 100-pin TQFP package and operates within a temperature range of 0°C to 70°C.
Designed for applications requiring precise clock distribution and timing control, this component is suitable for complex system integrations where timing optimization is critical.
The CY7B994V variant operates from 24 MHz to 200 MHz.
The matched pair output skew is less than 200 ps.
The device operates from a single 3.3V ±10% supply, ranging from 2.97V to 3.63V.
The operating temperature range is 0°C to 70°C.
It is available in a 100-pin TQFP (14x14) and a 100-pin LQFP package, both for surface mounting.
Yes, it features a fully integrated Phase Locked Loop (PLL) with a lock indicator.