| Distributor | Stock | Pricing | MOQ | PKG | Lead Time | Date Code | On Order Quantity | On Order Delivery | |
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3,600 pcs
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3600 pcs | On Request | 1 | On Request | On Request | On Request | On Request | On Request |
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The Infineon Technologies CY2309CSXI-1HT is a low-cost, 3.3V zero delay buffer engineered for distributing high-speed clock signals. This device features a single input that drives nine low-skew outputs, operating within a frequency range of 10 MHz to 133 MHz. It boasts zero input-to-output propagation delay and typical output-to-output skew of 85 ps, making it suitable for applications requiring precise clock synchronization.
The CY2309CSXI-1HT includes an on-chip Phase-Locked Loop (PLL) that locks to the input clock. It also supports a test mode to bypass the PLL for system testing. The buffer operates from 3V to 3.6V and is specified for an industrial temperature range of -40°C to 85°C. The device is available in a space-saving 16-pin SOIC package, designed for surface mounting.
This zero delay buffer is compatible with Pentium-based systems and provides LVCMOS/LVTTL inputs and LVCMOS outputs. The PLL enters a power-down mode when there are no rising edges on the reference input, reducing current draw. Its design makes it ideal for clock distribution in various computing and embedded systems.
The operating frequency range is 10 MHz to 133 MHz.
The typical output-to-output skew is 85 ps.
The operating voltage is between 3V and 3.6V.
The operating temperature range is -40°C to 85°C.
The CY2309CSXI-1HT is available in a 16-SOIC package.
Yes, it has a PLL with bypass capability.