| Distributor | Stock | Pricing | MOQ | PKG | Lead Time | Date Code | On Order Quantity | On Order Delivery | |
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190 pcs
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190 pcs | On Request | 1 | On Request | On Request | On Request | On Request | On Request |
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The Infineon Technologies CY2305SI-1 is a low-cost 3.3V zero delay buffer designed to distribute high-speed clocks. It operates in the 10 MHz to 133 MHz range, making it compatible with CPU and PCI bus frequencies. This buffer offers zero input-to-output propagation delay and low output-to-output skew, with a typical value of 85 ps.
Key electrical characteristics include a typical cycle-to-cycle jitter of 60 ps under high drive conditions. The device supports a voltage range of 3V to 3.6V and operates within an industrial temperature range of -40°C to 85°C. It features a 1:5 output ratio, distributing one input clock to five low-skew outputs.
The CY2305SI-1 is available in a space-saving 8-pin SOIC package, suitable for surface mount applications. The device integrates a Phase-Locked Loop (PLL) to lock onto the input reference clock. In power-down mode, when there are no rising edges on the REF input, the outputs are three-stated and the PLL is turned off, resulting in low current draw.
The CY2305SI-1 operates at up to 133.33 MHz.
The operating voltage for the CY2305SI-1 is between 3V and 3.6V.
The operating temperature range for the CY2305SI-1 is -40°C to 85°C.
The CY2305SI-1 is available in an 8-SOIC package.
The typical output-to-output skew for the CY2305SI-1 is 85 ps.
Yes, the CY2305SI-1 has an integrated PLL.