| Distributor | Stock | Pricing | MOQ | PKG | Lead Time | Date Code | On Order Quantity | On Order Delivery | |
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8 pcs
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8 pcs | On Request | 1 | On Request | On Request | On Request | On Request | On Request |
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The Infineon Technologies CY2304SXI-2T is a 3.3V Zero Delay Buffer, part of the Cypress™ Buffers family. It is engineered to distribute high-speed clocks in demanding applications such as PCs, workstations, datacom, and telecom systems.
This buffer utilizes an on-chip phase-locked loop (PLL) to lock onto an input clock signal. It offers zero input-to-output propagation delay, adjustable by capacitive load on the FBK input. The device provides multiple low-skew outputs and operates within a frequency range of 10 MHz to 133 MHz. Key electrical characteristics include a typical peak cycle-to-cycle jitter of 90 ps at 15 pF and 66 MHz, an input-to-output skew guaranteed to be less than 250 ps, and an output-to-output skew less than 200 ps.
The CY2304SXI-2T is housed in a space-saving 8-pin SOIC package, measuring 150-mil wide. It supports a voltage range of 3V to 3.6V and is available with an industrial temperature range of -40°C to 85°C. The device features a 1:4 ratio and supports both clock inputs and outputs, with a PLL capability.
Designed for surface mount applications, this buffer is suitable for high-performance systems requiring precise clock signal distribution. The PLL can enter a power-down state when no rising edges are detected on the REF input, reducing current draw to less than 25 μA.
The operating voltage is 3.3V.
The package type is 8-SOIC.
The operating temperature range is -40°C to 85°C.
Yes, it is RoHS3 Compliant.
The maximum operating frequency is 133.3MHz.
The typical peak cycle-to-cycle jitter is 90 ps at 15 pF and 66 MHz.