CDCVF2505DG4

The CDCVF2505DG4 from Texas Instruments is a high-performance, low-skew, low-jitter phase-lock loop (PLL) clock driver. Operating from a single 3.3V supply, this device is suitable for synchronous DRAM and general-purpose applications.

It distributes one clock input to one bank of five outputs, with CLKOUT used to tune the input-output delay. The device features LVTTL input and output types, with a maximum operating frequency of 200MHz. It offers low jitter, with cycle-to-cycle jitter less than 150 ps over the 66 MHz to 200 MHz range. The output duty cycles are adjusted to 50 percent, independent of the input clock duty cycle.

Designed for ease of use, the CDCVF2505DG4 includes integrated series-damping resistors and an on-chip RC PLL loop filter, eliminating the need for external components. The outputs automatically enter a three-state mode when there is no input clock signal, and the device enters a power-down mode when no input signal is applied to CLKIN. It is available in an 8-pin SOIC package with surface mount mounting type.

Key specifications include a core and output supply voltage of 3.3V, an operating temperature range of -40°C to 85°C, and an output skew of 150 ps. The additive RMS jitter is typically 70 fs.